HSST Computer Science | Computer Application

Model Questions for Higher Secondary School Teacher (HSST) in Computer Science/Computer Application

1. The size of an ATM cell is .......... bytes.

Ans. 53 bytes

2. “Stored program concept is attributed to:

Ans. John von Neumann

3. The cache which is on the same chip as the processor is called:

Ans. L1

4. Which level of RAID uses mirroring to achieve redundancy?

Ans. RAID level 1

5. A MAC address is .......... bytes long:

Ans. 6 Bytes

6. What is RARP means:

Ans. RARP - Reverse address resolution protocol (RARP) is used to allow a computer without a local permanent data storage media to determine its IP address from its ethernet address.

7. A compiler which runs on one machine and produces target code for another is called a:

(a) Bootstrapping compiler

(b) Just-in-time compiler

(c) Cross compiler

(d) Optimizing compiler

Ans. Cross compiler

8. The maximum length (in bytes) of an IP packet:

(a) 255

(b) 1023

(c) 32767

(d) 65535

Ans. 65535

9. What is returned by a fork() call to the child process?

(a) 0

(b) Process-id-pf parent

(c) Process-id of child

(d) -1

Ans. 0

10. The degree of multiprogramming is controlled primarily by?

(a) Short-term scheduler

(b) Medium-term scheduler

(c) Long-term scheduler

(d) Disk scheduler

Ans. Long-term scheduler

11. The BSD version of UNIX was developed by:

(a) Bell Labs

(b) MIT

(c) University of Berkeley

(d) Sun Microsystems

Ans. Bell Labs

12. Apple Computer’s version of the high performance serial bus used to connect devices to the personal computer is:

(a) Fire Wire

(b) High-Performance Parallel Interface

(c) Parallel sysplex

(d) iLINK

Ans. Fire Wire

13. The microchip that controls a computer’s interface to its attached serialdevices is:

(a) Virtual Device driver

(b) Universal Asynchronous Receiver/Transmitter

(c) Serial presence detect

(d) Bus master

Ans. Universal Asynchronous Receiver/Transmitter

14. In which cache mapping method is it possible to load each main memory block to any line of the cache?

(a) Direct Mapping

(b) Associative mapping

(c) Set-associative mapping

(d) None of the above

Ans. Direct Mapping

15. Which was the first processor to be shipped with a 1 gigahertz clock speed?

(a) Athlon

(b) BeOS

(c) Crusoe

(d) Pentium

Ans. Athlon

16. The data path and physical interface between the processor and the L1 and L2 memory is called:

(a) Backlink

(b) Backside bus

(c) CardBus

(d) Virtual memory

Ans. Backside bus

17. A group of microchips designed to work as a unit to perform one or more related functions is called:

(a) Biochip

(b) Bus

(c) Chipset

(d) Diode

Ans. Chipset

18. Who developed the concept of semaphores?

(a) Dekker

(b) Tanenbaum

(c) Kruskal

(d) Dijkstra

Ans. Dijkstra